![]() However plans for higher UDMA modes are in the works. Currently only PIO modes up to 4 are supported. In this way the behavior of ATA commands is entirely defined by a user space daemon running on the Pi in Linux user space. The Pi may then read the IDE register file, update the IDE register file, fill the incoming data FIFO with data, or read data from the outgoing data FIFO – all over SPI. When the IDE command register is written, the busy bit is automatically set and an interrupt is thrown to the Pi. The fundamental architecture consists of few simple components: ![]() ![]() The most revolutionary thing about it is the $5 price tag! However the ever-growing eco-system of hardware and software contributors now set it apart from the competition as much as the price point. The Raspberry Pi Zero was specifically chosen for it’s price point. However the primary goal of projects like this is to facilitate usability of the machines, conserve them for future generations, and augment older failing technology. Some consider coupling a modern co-processor with orders of magnitude more capability than the vintage machine itself while providing menial functionality ‘perverse’. The second direction B focuses on the ‘easy’ road – throw endless MHz, GHz, MIPS, and massive memory and storage at the problem. The wireless module may unavoidably have a higher level processor as long as it presents a basic external interface and it’s capabilities are not evident or generally exploitable. This would essentially involve a CPLD or FPGA providing a rudimentary bridge over an interface like SPI or SDIO to a commodity wireless module. no high level microprocessor or micro-controller running at clock rates that could eclipse (literally) millions of times the processing capability of the PC Jr itself. While this seems like an oxymoron with wireless networking functionality, it generally means design hardware at a schematic and register transfer level only eg. Direction A, or a minimalist approach, suggested we built a module with as close to period hardware as possible. Two directions emerge based on philosophical fundamentals. The NetPi-IDE project started out as a discussion about how to best add wireless support to an IBM PC Jr running an existing Jr-IDE expansion interface on Mike’s PC-Jr forums. This means others may use, modify, or even derive works from this project as long as the GPLv2 license is carried forward, all resulting material carries forth this license, and attribution is properly assigned. The project is 100% open source and tentatively released under the GPLv2 license for all software and hardware components. The development effort at this point should be considered very alpha and several months away before a group buy/build, crowd funding production run, or general availability to the vintage/retro computing community. It also provides additional features through IDE/ATA vendor commands that open up additional functionality such as network connectivity and bridging to a variety of other peripherals connected to the Raspberry Pi over USB ports. It is designed to emulate an IDE master, IDE slave, or a combination of both using raw image files stored on the Pi’s main micro-SD card. The NetPi-IDE project is essentially an IDE disk emulator based on a Raspberry Pi Zero module with a custom bridge board – allowing it to meet timing and performance targets defined in the ATA/ATAPI T13 specification which governs how IDE drives operate.
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